Serial Peripheral Interface

Defines

#define spi_interrupt_enable()   (SPCR |= _BV(SPIE))
#define spi_interrupt_disable()   (SPCR &= ~_BV(SPIE))
#define spi_enable()   (SPCR |= _BV(SPE))
#define spi_disable()   (SPCR |= _BV(SPE))
#define spi_data_order_msb_first()   (SPCR &= ~_BV(DORD))
#define spi_data_order_lsb_first()   (SPCR |= _BV(DORD))
#define spi_mode_master()   (SPCR |= _BV(MSTR))
#define spi_mode_slave()   (SPCR &= ~_BV(MSTR))
#define spi_clock_idle_high()   (SPCR |= _BV(CPOL))
#define spi_clock_idle_low()   (SPCR &= ~_BV(CPOL))
#define spi_clock_sample_leading()   (SPCR &= ~_BV(CPHA))
#define spi_clock_sample_trailing()   (SPCR |= _BV(CPHA))
#define spi_write_collision_p()   ((SPSR >> WCOL) & 0x1)

Functions

void spi_prescale_config (uint8_t prescale)

Define Documentation

 
#define spi_clock_idle_high (  )     (SPCR |= _BV(CPOL))

Configure SPI device with clock idle high.

Author:
Andrew H. Fagg
 
#define spi_clock_idle_low (  )     (SPCR &= ~_BV(CPOL))

Configure SPI device with clock idle low (default).

Author:
Andrew H. Fagg
 
#define spi_clock_sample_leading (  )     (SPCR &= ~_BV(CPHA))

Configure SPI device with sample leading the clock edge (default).

Author:
Andrew H. Fagg
 
#define spi_clock_sample_trailing (  )     (SPCR |= _BV(CPHA))

Configure SPI device with sample trailing the clock edge.

Author:
Andrew H. Fagg
 
#define spi_data_order_lsb_first (  )     (SPCR |= _BV(DORD))

Configure SPI data order to be LSB first (default).

Author:
Andrew H. Fagg
 
#define spi_data_order_msb_first (  )     (SPCR &= ~_BV(DORD))

Configure SPI data order to be MSB first

Author:
Andrew H. Fagg
 
#define spi_disable (  )     (SPCR |= _BV(SPE))

Disable the SPI hardware device

Author:
Andrew H. Fagg
 
#define spi_enable (  )     (SPCR |= _BV(SPE))

Enable the SPI hardware device

Author:
Andrew H. Fagg
 
#define spi_interrupt_disable (  )     (SPCR &= ~_BV(SPIE))

Disable the SPI device interrupt

Author:
Andrew H. Fagg
 
#define spi_interrupt_enable (  )     (SPCR |= _BV(SPIE))

Enable the SPI device interrupt

Author:
Andrew H. Fagg
 
#define spi_mode_master (  )     (SPCR |= _BV(MSTR))

Configure SPI device as a master.

Author:
Andrew H. Fagg
 
#define spi_mode_slave (  )     (SPCR &= ~_BV(MSTR))

Configure SPI device as a slave.

Author:
Andrew H. Fagg
 
#define spi_write_collision_p (  )     ((SPSR >> WCOL) & 0x1)

Check whether a write collision occurred.

Returns:
0: no collision has occurred
1: a collision has occurred
Author:
Andrew H. Fagg

Function Documentation

void spi_prescale_config ( uint8_t  prescale  ) 

Configure the prescaler for the SPI master

Parameters:
prescale One of:
SPI_PRE_2 Divide system clock by 2
SPI_PRE_4 Divide by 4
SPI_PRE_8 Divide by 8
SPI_PRE_16 Divide by 16
SPI_PRE_32 Divide by 32
SPI_PRE_64 Divide by 64
SPI_PRE_64b Divide by 64 (??? why two)
SPI_PRE_128 Divide by 128
Todo:
Understand why there are two cases of 64
Author:
Andrew H. Fagg
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